Analyzing LOFAR station processing on multi-core platforms

The LOw-Frequency ARray (LOFAR) is a phasedarray radio telescope in the Netherlands. Currently, the astronomical community is embarking upon designing a new telescope, the Square Kilometer Array (SKA). As many of the LOFAR techniques form the basis for several SKA modes of operation, a retrospective analysis of LOFAR, reviewing its design given recent advances in technology, is of interest. This work is part of a retrospective analysis of LOFAR and evaluates the digital part of the station processing on a multicore platform. An implementation is executed on a quad-core Intel Core∗ i7-3820, using its SSE and AVX instructions. Results show there is no obvious optimal data layout in memory nor parallelization strategy, as choices improve performance of certain algorithms and decrease performance of others. Using AVX instructions and HyperThreading results in best performance. A roofline analysis is performed, comparing the current Virtex4 implementation in the field with an Intel Core i7 implementation. Further improvements of the multi-core implementation, to reach performance of the Virtex-4 platform, include using more physical processors or accelerators such as GPUs. A comparison with Virtex-7 x690T FPGAs is made and, based on the roofline model, it is approximated that 3 state-of-the-art Virtex-7 FPGAs would be required. The results support the choice for FPGAs in the current LOFAR design.